Use this forum to chat about hardware specific topics for the ESP8266 (peripherals, memory, clocks, JTAG, programming)

User avatar
By fgomes
#42129 Hi, I need to put the ESP8266 in a very low power consumption mode, it will restart by external hardware when needed, and this hardware could control the CH_PD pin. It is currently using 2 diodes (because the wake up might come from two different circuits, so this is an easy way to make an OR 'gate') and the cathode from the two diodes are connected to the ESP12 module pin CH_PD. What I observed is that even without any pull-up the ESP12 module works well, even without any external drive of these two diodes (or even without anything connected to the CH_PD pin). This way even removing the control voltage from both diode anodes the ESP12 continues to work normally. So it seems it needs a pull-down to force it to zero, but reading the documentation it seems it shouldn't be that way, everyone recommends to have a pull up to have the module wake-up, but all my ESP12 modules work without any pull-up connected to the CH_PD input. Do you find any reason for this behavior? Does the CH_PD pin has any internal pull-up? Or the ESP12 module adds any additional pull-up to the CH_PD pin?

Thanks in advance for your help!

Best regards

Fernando
User avatar
By martinayotte
#42160 Most electronic chips are reacting to floating pins like it is a HIGH level, but it is NOT a good practice to leave them floating since they also act like an antenna, and ESD waves in the air can fluctuate and can some time be strong enough to make the react as LOW. Therefore, all the pins that requires HIGH level should have external PullUps, never rely on "weak" internal pullups even when there are ones.

Here is a funny quote from Espressif Hardware User Guide about RES and CH_PD pins that suppose to have an internal pullup, but cannot be left dangled :

There exists internal pull-up resistor in the reset pin, Pin32, which can be left dangled when it is not
used. When the chip is enabled, the reset pin is held low. In order to avoid reset caused by external
interference, the lead is generally required to be short, and no external pull-up resistor is necessary.
The enable pin CH_EN (pin 7) can also serve as a reset pin. If voltage for CH_EN pin is low, the
chipset ESP8266EX will power off. Note that this pin cannot be dangled.
User avatar
By fgomes
#42319 Thank you very much for the answer! The statement "cannot be left dangled" is delicious :-)

I know that strange things happen when you left pins floating (specially in harsh EMC environments even with week pull-ups/downs), my doubt was if there are already pull-ups/downs inside the ESP12 module shield, I never opened it and don't have its schematics.

Since I'm using this circuit to reduce the power consumption shutting down the chip through CH_PD pin (I suppose this pin is connected to the CHIP_EN pin in the ESP8266 chip), do you know if there is any issue with having logic levels applied to the ESP8266 chip GPIO pins while keeping the chip shut down (CH_PD to ground but other interface circuits still applying logic levels to GPIO pins)? I know that I can't apply voltages to GPIO pins with the chip not powered, but do you know if there is any problem with the chip in the shutdown state?

Best regards

Fernando
User avatar
By martinayotte
#42327 The "weak" internal pullups are not on the PCB itself but inside the ESP8266 silicon.
I don't think there is issue having some signal present on some pins while CH_PD been down.
The only recent discovery I know is not during power down, but during deepSleep where GPIO16 driving the RES with and HIGH level instead of OpenDrain, preventing external reset been effective, it been workarounded by adding a serie resistor instead of wire between GPIO16 and RES.