Depending on the actual part implementation it could be simple or a little trickier. When there is data in the queue to send, the gpio bit is set high, then the data sent. When there is no more data to send and the uart has actually clocked out all the bits, then the gpio is set low. Hopefully the uart has a tx complete bit/interrupt rather than just a tx buffer empty bit/interrupt - otherwise the timer needs to be used to predict the end of the last byte of transmission based on the baud rate.
Depending on the actual part implementation it could be simple or a little trickier. When there is data in the queue to send, the gpio bit is set high, then the data sent. When there is no more data to send and the uart has actually clocked out all the bits, then the gpio is set low. Hopefully the uart has a tx complete bit/interrupt rather than just a tx buffer empty bit/interrupt - otherwise the timer needs to be used to predict the end of the last byte of transmission based on the baud rate.