- Sun Sep 07, 2014 11:35 am
#303
Thanks for posting this - I wanted to do it, but couldn't find time. And indeed, community can't afford to have dedicated sites for each chip.
I share your sentiment regarding "big player" and crutches required for a chip - look at MT7681 module - it's full of breadcrumbs of passive components. It seems that only little guys like Espressif do their homework and put everything, up to RF stuff like baloon, into a chip. Big guys threw out yet another little monster. So, my sympathy is definitely with Espessif, if they will be friendly and open, I hope they'll have a chance to stand in IoT niche.
One interesting thing in MT7681 is its internal CPU architecture. I never saw Xtensa in the wild, but at least I heard about it. But MT7681 is based on completely new stealth arch called "Andes". Gotta love CPU zoo we're having here (throw in GPS with embedded SPARC for more fun:
http://www.reddit.com/r/programming/com ... _10hz_gps/).
Andes arch appear to be MIPS hack-alike. Specifically, guys wanted to use proven arch, but didn't want to license it, so made theirs instruction set. As in MIPS, there're 32 regs, etc. However, with further evolution of instruction set, they went away from RISC purity towards real-world practicality - e.g., there're short instructions which implicitly address stack pointer, etc.
Contrary to contraries, there's Open Source support for Andes CPUs:
http://osdk.andestech.com/ . Actually, GCC support is already upstream in 4.9. Surely, there's a bit of difference between GCC supporting Andes arch and being able to build apps for MT7681 (similar to that which we experience with ESP8266).
Mandatory CNX link:
http://www.cnx-software.com/2014/09/01/ ... wdfunding/
