ESP8266 Community Forum

- Mon Sep 22, 2014 6:07 am #817 PDF is the same (but updated now) as in the opening post.

https://drive.google.com/file/d/0B_5UXa ... sp=sharing

- Mon Sep 22, 2014 8:37 am #819 Hi Calude,

Congrats and thank you for sharing!

I have some small remarks (nothing really important), but I fear they may come too late

• it could be interesting for a more professional design to add some ESD protection devices on both USB and SMA antenna ports
• it could be nice to integrate a way to jump into flash mode from software by using some UART junction signals: you already use DTR# for EXT_RSTB, maybe RTS# for GPIO0?
• what is the PCB thickness and permittivity? It looks like there are 2 different trace widths (before / after RF0/RF1) for the 50 ohms impedance RF signal. For 1mm thickness, Er = 4.2 and 6 mils min traces / clearance, the 50 ohm RF trace in "coated coplanar waveguide with ground 1B" configuration should be 26 mils wide:
  50 Ohms.PNG

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- Mon Sep 22, 2014 9:49 am #820 YAY Polar
There must someone have too much money (Or a proper use for it...)

Can I ask you for some assistance when it comes to Devboard Rev2 ?

PCB is FR4 1.6mm , Er = whatever dirty pcb delivers....

Feed to the Filter Network is 30mil , Clearance 7mils (Thats what I got for 50ish Ohms with an Er of 4.5 )
After the Filter the Feedline to the Antenna and SMA is 10mils , probably slightly off 50Ohms -> 87Ohms....

Regarding ESD protection : Definitely in Rev2

I thought about GPIO0 a while and even had it in the layout but removed it in the end. I would need a real open drain pin to pull the GPIO down, otherwise one could only use the board when the ftdi rts pin is correctly driven. Also when the ftdi is connected directly the GPIO wouldn't be really usefull. In the end I couldn't are myself to come up with something proper... But again Rev2 ? Dirt cheap PCBs is so cheap that an other try doesn't really hurt the wallet.

- Mon Sep 22, 2014 10:48 am #821

YAY Polar
There must someone have too much money (Or a proper use for it...)

Can I ask you for some assistance when it comes to Devboard Rev2 ?

PCB is FR4 1.6mm , Er = whatever dirty pcb delivers....

It comes straight from my Chinese manufacturer, they sure have a proper usage for it

But I will ask for 1.6 mm with enough Er tolerance to get 50 ohms at dirtypcb.

Feed to the Filter Network is 30mil , Clearance 7mils (Thats what I got for 50ish Ohms with an Er of 4.5 )
After the Filter the Feedline to the Antenna and SMA is 10mils , probably slightly off 50Ohms -> 87Ohms....

OK, but why does the feedline to the antenna is 10 mils then?

I thought about GPIO0 a while and even had it in the layout but removed it in the end. I would need a real open drain pin to pull the GPIO down, otherwise one could only use the board when the ftdi rts pin is correctly driven. Also when the ftdi is connected directly the GPIO wouldn't be really usefull. In the end I couldn't are myself to come up with something proper... But again Rev2 ? Dirt cheap PCBs is so cheap that an other try doesn't really hurt the wallet.

... Then add a transistor! A design is never complete without a discrete transistor

GPIO0 has to be driven either high or low at bootup, so it won't be useful for anything else anyway... This is not the case for other GPIOs, where you can expect to have a somewhat stable configuration for a given project.