Use this forum to chat about hardware specific topics for the ESP8266 (peripherals, memory, clocks, JTAG, programming)

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By rudy
#76150 The image isn't big enough to make out enough detail. It would be good to see the layers separate. But from what I can make out:

Suggestion, get rid of pads 17-22. You will not use them and they restrict you.

The trace from pin 4 (GPIO16) is shorting to pin 9 (GND). You need more clearance.

It looks like most of your small parts that have connections to 3.3v or gnd have the pad fully merged with the copper pour. This is a problem when it comes to soldering. The copper will suck away the heat from the pad. It is desirable to have the pad with space around it and connect to the copper plane with trace segments.

Make sure your vias have a large enough diameter pad, taking into account the via hole diameter.
Your traces look thin too me. I try and use 0.010" as the width, 0.008" minimum.

I tend to use 0805 parts as they are easier to work with.

I recommend having a pull up on the RX line. Some modules will not start up properly if it is not high.

I would add pull ups on the other pins. You don't have to populate them, but if you need them later it is easier if there was a spot for it already.

Use a heavier trace for GND to the module. You did for VCC, so why not for GND.
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By davydnorris
#76160 I have put pull ups on both my Tx lines as well (UART0 and UART1) - this was as a result of discussions around wifi stability on this forum. It was discovered that that serial output on the Tx lines can radiate and cause interference on the radio in some way.

I have found it has helped my wifi connection stability immensely.
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By spy king
#76168 Thanks, appreciate the the quick feedback! :-)
Have added the pullup and fixed the GPIO 16 track. I chose to go with 0603 as I have access to a microscope and re flow + hot air rework station. Also the reason for no thermal relief on the SMD pads in the pours.

The smallest track widths are 0.254mm (10 mills) and all vias are .6mm.

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