-->
Page 1 of 1

Flush RX/TX FIFO

PostPosted: Fri Jan 27, 2017 9:42 am
by espenlaub
Hello,

for a special serial device (LIN) i need to generate a BREAK signal. This is, when TX is going LOW for 25ms and HIGH for 25ms bevore sending any further bytes at normal serial speed.

I managed to generate this signal by:
Code: Select allPIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U,FUNC_GPIO1);
GPIO_OUTPUT_SET(1, 0);
usleep(25000);
GPIO_OUTPUT_SET(1, 1);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);

Hopefully, this is the way to do it? If not, please tell me!

Now, because this LIN-Device uses a single-wire serial-bus, TX and RX are coupled, so i read all i send. The BREAK signal generation therefore also produces a 0x00 byte in the RX-FIFO and most likely a frame error in the RX-UART control.

I think i should clear some errorflags and rx-fifo (flush) after the signal is send, to prevent errors in sending/receiving with normal serial comm. How to do this?

Re: Flush RX/TX FIFO

PostPosted: Mon Mar 19, 2018 4:50 pm
by proddy
Hi espenlaub, did you find a way in the end. I'm doing something similar and after my TX I send a break by enabling the loopback and setting the TX BRK. It's picked up on RX and echo'd and then all my buffers get out of sync.

Re: Flush RX/TX FIFO

PostPosted: Sat Apr 14, 2018 5:42 am
by eriksl
I think the most simple solution would be to disconnect not only the output pin from TX, but also disconnect the input pin from RX, temporarily, that way the UART will never see the break.

Re: Flush RX/TX FIFO

PostPosted: Sat Apr 14, 2018 8:40 am
by McChubby007
Many commercial async drivers will signal the break event back to the kernel/user space for action or just discarded and ensure rx side is not interfered with. Perhaps it would be worth raising an issue with espressif and/or esp8266 arduino core to have this added to the sdk/core.