ESP8266 Community Forum

- Thu Jan 02, 2020 3:24 pm #85137 Hi everyone,

I am following CNLohr on YouTube since his first ESP8266-related video and I've watched pretty much every video from him ever since. It's now more than three years ago since he posted this video about manipulating the ESP8266's PLL and increasing its clock speed well beyond 160MHz. A little explanation, how he was able to do this together with some code can be found on his GitHub: https://github.com/cnlohr/nosdk8266

I found it interesting back then but didn't do anything with it, so three years have passed and I recently re-watched his old videos and just discovered this repository again. And now I am really interested in it.
The downside of course it that is only works with WIFI disabled.

But I guess if you want a cheap and very powerful CPU for heavy computational tasks - this is an ideal solution!

My problem so far is that I don't really understand what he is doing in his code and where the important PLL values are set. I was also wondering whether it is possible to increase the PLL and still use the RTOS SDK? You can probably do some inline assembler which should do the trick, right?

There also is a small benchmark, executed at different clock speeds and clearly showing how much more performance is possible with the altered PLL values: https://gist.github.com/SmallRoomLabs/f ... 5e1ea230c8

Did anyone ever try this (together with the RTOS SDK)?

- Fri Jan 03, 2020 4:39 am #85142 Sorry, I am in the same boat as you.

I think it could be possible to raise the frequency only temporarily. So boot like usual (inclusing SDK and WLAN), then raise the clock for a small amount of time (probably less than 100 millisec), do a heavy computational task (WLAN won't work during that time) and then switch back to normal clock.

I too think the documentation is too poor to be useful.

- Fri Jan 03, 2020 5:04 am #85143 Hi eriksl and thank you for your reply,

I wouldn't even care if Wifi didn't work at all!

But as you said, no idea what he is doing with all that #defines in his code and where the actual magic is happening.

- Fri Jan 03, 2020 5:09 am #85145 For me WLAN is required (I am not using UART normally).

One of the issues is the fiddling with the i2c (???) functions in ROM from Espressif. I'd rather like it if someone would reverse engineer this actual code and expose it. So we can see what's actually happening (and use it as we like).

I suspect the ROM functions are actually not i2c but i2s related and it's referring to clock generator for i2s which then assumingly is shared with the CPU PLL.