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Glitchy clock when using HSPI?

PostPosted: Sat Jan 23, 2021 2:02 pm
by hjalfi
I'm trying to talk to an SD card. I'm using bare-metal programming, not using one of the SDKs. While I've managed to figure out how to set up HSPI to send bytes, the output SCLK signal is incredibly glitchy. See this logic analyser screenshot:


From top to bottom, that's CS, MOSI, SCLK, MISO. You can see that SCLK is displayed as grey blocks, because it's actually oscillating from on to off and back again at about 4MHz. SCLK itself is at about its minimum setting of about 100Hz.

Clearly the HSPI module is mostly working, but I really don't understand what's going on here. I'm using a grey-market D-Duino clone, similar to one of these: https://github.com/lspoplove/D-duino The screen's connected via GPIO4 and 5, so that shouldn't be a factor. Could there simply be something wrong with it? Or have I missed something obvious with the setup? I get the same noise regardless of whether the SD card is attached or not, so the problems not at that end.

Any ideas?

Re: Glitchy clock when using HSPI?

PostPosted: Sat Jan 23, 2021 7:06 pm
by RichardS
Looks to me like your sampling at 40khz? with the 4Mhz every 10ms....

What sample rate are you set to 100hz??

This somewhere the dividers etc... and not set correctly.

Re: Glitchy clock when using HSPI?

PostPosted: Sun Jan 24, 2021 6:07 am
by hjalfi
I'm sorry, I don't quite follow you with regard to the sample rate --- do you mean the logic analyser sample rate? I've used an actual oscilloscope and the problem shows up there too:


Which clock configuration do you suggest I look at? I'm using a hard-coded value for the HSPI clock taken from the Arduino source, for the minimum possible value, and the overall shape of the clock pulses look correct, so the high-frequency oscillation must be coming from somewhere else.

Re: Glitchy clock when using HSPI?

PostPosted: Thu Mar 11, 2021 10:23 am
by eriksl
I don't believe I've seen this phenomenon when I was exploring HSPI. Now I must say my 'scope is very limited, it will only sample at 160 Mhz max and only in the digital domain, so I can't see actual waveforms, only on and off.

Maybe indeed a good suggestion to twiddle a bit with the clock scalers, maybe you have a combination that's not completely supported.

Can I ask for what purpose you need an absolute steady clock? Because SPI by design can work with a very irregular clock (just like I2C). There is no requirent (generally) that the clock runs on a fixed frequently, as long as the slave has enough time to respond.