- Thu Aug 18, 2016 8:13 am
#53219
What changes I'd have to do in the driver, If I need to do the following:
Step 1 : Make CS Low
Step2 : Send 8 bytes of data
step3 : Make CS High
I have tested the driver and it works great. However I am facing a small issue. The HSPI_CS pin is hardware controlled and it goes high automatically after sending each byte and then there are 8 dead clock cycles after which the HSPI_CS line again goes low and transfers the next byte. So, currently I am trying to send 2 bytes of data back to back and this is whats happening:
step 1: CS goes Low
step 2 : First byte sent
step 3: CS goes High
step 4: CS stays high for the next 8 dead clock cycles
step 5: CS goes Low
step 6: Second byte sent
step 7: CS goes high
Since my slave devices wouldn't work with this scenario. Therefore, I am looking for a way, where I can send multiple data bytes back to back which the CS line remains low until the last byte has been transferred. And also I'd like to remove those 8 dead clock cycles between each byte transfers. I taught to post on stack exchange, but since you have written this drivers, taught I could post here and seek some help directly from you. Any help or advise with some settings to do in the SPI registers for this would be greatly appreciated.
Regards
VD
Step 1 : Make CS Low
Step2 : Send 8 bytes of data
step3 : Make CS High
I have tested the driver and it works great. However I am facing a small issue. The HSPI_CS pin is hardware controlled and it goes high automatically after sending each byte and then there are 8 dead clock cycles after which the HSPI_CS line again goes low and transfers the next byte. So, currently I am trying to send 2 bytes of data back to back and this is whats happening:
step 1: CS goes Low
step 2 : First byte sent
step 3: CS goes High
step 4: CS stays high for the next 8 dead clock cycles
step 5: CS goes Low
step 6: Second byte sent
step 7: CS goes high
Since my slave devices wouldn't work with this scenario. Therefore, I am looking for a way, where I can send multiple data bytes back to back which the CS line remains low until the last byte has been transferred. And also I'd like to remove those 8 dead clock cycles between each byte transfers. I taught to post on stack exchange, but since you have written this drivers, taught I could post here and seek some help directly from you. Any help or advise with some settings to do in the SPI registers for this would be greatly appreciated.
Regards
VD
