Re: Setting SDA and SCL pins for I2C
Posted:
Tue May 26, 2015 7:23 amby eriksl
Exactly.
The reason why you're not attaining much more than 100 kHz is because you need to "bang" each bit on it's own, in software.
But that's no problem. Many i2c devices won't work beyond 100 kHz anyway.
Re: Setting SDA and SCL pins for I2C
Posted:
Tue May 26, 2015 9:20 amby GeorgeIoak
True, I won't argue that 100kHz is the most common bus speed but there are devices that can run at 400kHz or more. My point is that a specification should be providing details on the what the chip can do. If the CPU is running at 80MHz a program written in C should be able to toggle the GPIO pin much faster than 100kHz. Sure bit banging has some additional CPU clock cycles but I can't see why this comment about being limited to 100kHz is made.
I knew there was another reason I thought this might have hardware I2C, take a look at the block diagram in the datasheet, it clearly shows a I2C block.
Re: Setting SDA and SCL pins for I2C
Posted:
Tue May 26, 2015 9:38 amby cal
Re: Setting SDA and SCL pins for I2C
Posted:
Tue May 26, 2015 10:56 amby GeorgeIoak
Wow, very well written and detailed article. This is the type of detailed information that should be provided by the manufacturer. At least we have dedicated people that spend the extra time to provide useful information for the rest of us but if you hadn't pointed that article out I'm not sure I ever would have found it.