ESP8266 Community Forum

- Mon Nov 17, 2014 4:14 am #2784 Hi igrr
+IPR and +CWMODE
modify

interface_commands.c

ETS_UART_INTR_DISABLE();
config_save();
ETS_UART_INTR_ENABLE();

uart.c

// size_t tx_count = (READ_PERI_REG(UART_STATUS(0)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT;
// if (tx_count < (UART_TX_FIFO_SIZE - size_needed))
// break;
size_t tx_count = READ_PERI_REG(UART_STATUS(0)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
if((tx_count >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) == 0)
break;

wifi_commands.c

ETS_UART_INTR_DISABLE();
wifi_set_opmode(argv[0].value.number);
ETS_UART_INTR_ENABLE();

- Mon Nov 17, 2014 5:47 pm #2810 That fixes problem for me, i also added

Code: Select allETS_UART_INTR_DISABLE();
strcpy(conf.ssid, argv[0].value.string);
strcpy(conf.password, argv[1].value.string);
wifi_station_set_config(&conf);
wifi_station_connect();
ETS_UART_INTR_ENABLE();

In wifi_handle_CWJAP to fix similar problem with AT+CWJAP="ap","password"

- Mon Nov 17, 2014 8:46 pm #2814

That fixes problem for me, i also added

Code: Select allETS_UART_INTR_DISABLE();
strcpy(conf.ssid, argv[0].value.string);
strcpy(conf.password, argv[1].value.string);
wifi_station_set_config(&conf);
wifi_station_connect();
ETS_UART_INTR_ENABLE();

In wifi_handle_CWJAP to fix similar problem with AT+CWJAP="ap","password"

It seems that must disabled uart intr before operating the flash

- Tue Nov 18, 2014 1:47 am #2826 Hi Jesse, thanks for the tip.
It makes sense now, apparently at 115200 the trailing LF character came before we had time to start writing to flash. But at 9600 the time is enough to break the flash writing procedure. I wonder why the flash writing procedure is not wrapped with ETS_UART_INTR_DISABLE / ENABLE at a lower level. Now the user of the api has to remember which functions write something to flash and which don't. Maybe Espressif can fix this in some future SDK version.

I have one question though:

// size_t tx_count = (READ_PERI_REG(UART_STATUS(0)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT;
// if (tx_count < (UART_TX_FIFO_SIZE - size_needed))
// break;
size_t tx_count = READ_PERI_REG(UART_STATUS(0)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
if((tx_count >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) == 0)
break;

Why are you breaking out of the loop when the TX FIFO is empty? We only have size_needed bytes to send, so my logic was to wait until there is less than UART_TX_FIFO_SIZE - size_needed bytes in the FIFO. Is that wrong somehow?

edit: I have pushed the fix to github and updated the binaries.