I'm looking to setup my Rx sampling rate up to 24 Mhz in the I2S port but from the formula I found in github, seems to not be possible:
CLK_I2S = 160MHz / I2S_CLKM_DIV_NUM
BCLK = CLK_I2S / I2S_BCK_DIV_NUM
WS = BCLK/ 2 / (16 + I2S_BITS_MOD)
Also, I couldn't find much information about this in the Technical reference manual from ESP8266. In some other sample code, people mention that I2S_CLKM_DIV_NUM value can not be lower than 5 neither I2S_BCK_DIV_NUM be lower than 2 but I can't find the reason about it.
So in concrete what will be the maximum stable sampling rate I can reach?
Thanks in advance