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Moderator: eriksl

User avatar
By eriksl
#92254 I will try to interpret the function prologue.

Assembler Syntax

S32I at, as, 0..1020

Description S32I is a 32-bit store from address register at to memory. It forms a virtual address by adding the contents of address register as and an 8-bit zero-extended constant value encoded in the instruction word shifted left by two. Therefore, the offset can specify mul- tiples of four from zero to 1020. The data to be stored is taken from the contents of ad- dress register at and written to memory at the physical address.


Code: Select all40007968:   e0c112    addi   a1, a1, -32             ; make 32 bytes of space on the stack (a1)
4000796b:   0139         s32i.n   a3, a1, 0        ; move a3 to 0(a1), i.e. save the contents of a3 on the stack
4000796d:   1109         s32i.n   a0, a1, 4        ; move a0 to 4(a1), i.e. save the contents of a0 on the stack
4000796f:   31d9         s32i.n   a13, a1, 12    ; move a13 to 12(a1), same way
40007971:   21c9         s32i.n   a12, a1, 8      ; move a12 to 8(a1), same way
40007973:   41e9         s32i.n   a14, a1, 16    ; move a14 to 16(a1), same way


So this saves a few registers, we still don't know what registers (parameters) are used. More to come ;)
User avatar
By eriksl
#92257
Assembler Syntax

MOV.N at, as

Description

MOV.N is similar in function to the assembler macro MOV, but has a 16-bit encoding. MOV.N moves the contents of address register as to address register at. The operation of the processor when at and as specify the same register is undefined and reserved for future use.


Assembler Syntax

L32R at, label

Description

L32R is a PC-relative 32-bit load from memory. It is typically used to load constant values into a register when the constant cannot be encoded in a MOVI instruction. L32R forms a virtual address by adding the 16-bit one-extended constant value encoded in the instruction word shifted left by two to the address of the L32R plus three with the two least significant bits cleared. Therefore, the offset can always specify 32-bit aligned addresses from -262141 to -4 bytes from the address of the L32R instruction. 32 bits (four bytes) are read from the physical address. This data is then written to address register at.


Assembler Syntax

SLLI ar, as, 1..31

Description SLLI shifts the contents of address register as left by a constant amount in the range 1..31 encoded in the instruction. The shift amount sa field is split, with bits 3..0 in bits 7..4 of the instruction word and bit 4 in bit 20 of the instruction word. The shift amount is encoded as 32−shift. When the sa field is 0, the result of this instruction is undefined.


Assembler Syntax

ADD.N ar, as, at

Description This performs the same operation as the ADD instruction in a 16-bit encoding. ADD.N calculates the two’s complement 32-bit sum of address registers as and at. The low 32 bits of the sum are written to address register ar. Arithmetic overflow is not detected.


These functions convert i, a signed long long, to floating point.

Runtime Function: float __floatunsisf (unsigned int i)
Runtime Function: double __floatunsidf (unsigned int i)
Runtime Function: long double __floatunsitf (unsigned int i)
Runtime Function: long double __floatunsixf (unsigned int i)


Code: Select all40007975:   05cd         mov.n   a12, a5;  move a5 to a12, I am not sure what a5 is at this moment, maybe also a way to save it
40007977:   fff7e1       l32r   a14, 40007954 <pllat_00000040>; copy the 32 bit value at 40007954 to a14, this is a location just before the code of this function
4000797a:   0d0c         movi.n   a13, 0; set a13 to 0
4000797c:   110260     slli   a0, a2, 10; take register a2 (frame pointer?), shift it by 10 and put it in a0 (scratch?)
4000797f:   040a         add.n   a0, a4, a0; add a4 to a0 (what is a4?)
40007981:   1120e0     slli   a2, a0, 2; take register a0, shift it by 2 and store it (back) to a2
40007984:   069605     call0   4000e2e8 <__floatunsidf>; convert unsigned long int in a2 to a double


I think at least this means that a2 is used for the first parameter.

Also, I think the name of the function is suspicious, now I look at it. Doesn't it mean there is really another PLL for the "RF" hardware, i.e. the wlan circuitry?
User avatar
By RBMK
#92259
eriksl wrote:
Assembler Syntax

MOV.N at, as

Description

MOV.N is similar in function to the assembler macro MOV, but has a 16-bit encoding. MOV.N moves the contents of address register as to address register at. The operation of the processor when at and as specify the same register is undefined and reserved for future use.


Assembler Syntax

L32R at, label

Description

L32R is a PC-relative 32-bit load from memory. It is typically used to load constant values into a register when the constant cannot be encoded in a MOVI instruction. L32R forms a virtual address by adding the 16-bit one-extended constant value encoded in the instruction word shifted left by two to the address of the L32R plus three with the two least significant bits cleared. Therefore, the offset can always specify 32-bit aligned addresses from -262141 to -4 bytes from the address of the L32R instruction. 32 bits (four bytes) are read from the physical address. This data is then written to address register at.


Assembler Syntax

SLLI ar, as, 1..31

Description SLLI shifts the contents of address register as left by a constant amount in the range 1..31 encoded in the instruction. The shift amount sa field is split, with bits 3..0 in bits 7..4 of the instruction word and bit 4 in bit 20 of the instruction word. The shift amount is encoded as 32−shift. When the sa field is 0, the result of this instruction is undefined.


Assembler Syntax

ADD.N ar, as, at

Description This performs the same operation as the ADD instruction in a 16-bit encoding. ADD.N calculates the two’s complement 32-bit sum of address registers as and at. The low 32 bits of the sum are written to address register ar. Arithmetic overflow is not detected.


These functions convert i, a signed long long, to floating point.

Runtime Function: float __floatunsisf (unsigned int i)
Runtime Function: double __floatunsidf (unsigned int i)
Runtime Function: long double __floatunsitf (unsigned int i)
Runtime Function: long double __floatunsixf (unsigned int i)


Code: Select all40007975:   05cd         mov.n   a12, a5;  move a5 to a12, I am not sure what a5 is at this moment, maybe also a way to save it
40007977:   fff7e1       l32r   a14, 40007954 <pllat_00000040>; copy the 32 bit value at 40007954 to a14, this is a location just before the code of this function
4000797a:   0d0c         movi.n   a13, 0; set a13 to 0
4000797c:   110260     slli   a0, a2, 10; take register a2 (frame pointer?), shift it by 10 and put it in a0 (scratch?)
4000797f:   040a         add.n   a0, a4, a0; add a4 to a0 (what is a4?)
40007981:   1120e0     slli   a2, a0, 2; take register a0, shift it by 2 and store it (back) to a2
40007984:   069605     call0   4000e2e8 <__floatunsidf>; convert unsigned long int in a2 to a double


I think at least this means that a2 is used for the first parameter.

Also, I think the name of the function is suspicious, now I look at it. Doesn't it mean there is really another PLL for the "RF" hardware, i.e. the wlan circuitry?


I think the same when i first saw the function, but, following Charles notes https://github.com/cnlohr/nosdk8266/blob/master/src/nosdk8266.c#L87 the "rf" part dont matter
User avatar
By eriksl
#92260 So it's probably another foobar name from Espressif...

I'll go ahead with the interpretation soon.