Left for archival purposes.

User avatar
By TerryE
#15862 Mike,

Thanks for this. I think that my answer is none -- until ESP boards with larger Flash are available -- and even then, it would be nice to make their initialisation lazy so the extra modules don't take up application RAM. With each release, the amount of RAM available to Lua developers goes down. (Though I am still waiting for cjson to work plus HTTP encode and decode.)

A standard autoconf style of configure would make building tailored image -- that is with only the modules that your project requires loaded -- a lot easier. The alternative might be some form of ROMfs burning routine so that the modules could be moved into ROMfs loadlib files would be an alternative. Anyway, thanks for asking :)
User avatar
By mikewen
#15868
TerryE wrote:Mike,

Thanks for this. I think that my answer is none -- until ESP boards with larger Flash are available -- and even then, it would be nice to make their initialisation lazy so the extra modules don't take up application RAM. With each release, the amount of RAM available to Lua developers goes down. (Though I am still waiting for cjson to work plus HTTP encode and decode.)

A standard autoconf style of configure would make building tailored image -- that is with only the modules that your project requires loaded -- a lot easier. The alternative might be some form of ROMfs burning routine so that the modules could be moved into ROMfs loadlib files would be an alternative. Anyway, thanks for asking :)


I know the RAM is a big problem, it is a pain for me as well. However, I heard that the new ESP8266 will have more RAM. It could come later this year.
User avatar
By TerryE
#15951 Mike, extra RAM would require a new chip from ESP as we're talking about integrating a new RAM library on silicon so we're into production volumes, etc. and I am not sure that the ESP team have recovered their initial investment yet. However a 16 mBit SRAM rather than a 4mBit one is board fab and that's a few months and a modest delta, so that's my first interest -- as well as a 0.1" pitch form factor with more IO pins exposed. This would be a good thing, and this is a product that nodeMCU could bring to the market -- if they wanted -- within a few months.

I -- like many developers -- do my prototyping on 0.1" pitched through-hole prototyping board, and having to add extra daughter boards or other botches is a pain. So having an ESP-03B, say, with the pin-outs on a 0.254 pitch and 2Mbyte of SRAM would be brilliant, IMO. OK, we might be tiny in volumes compared to a mainstream IoT manufacturer, but people like me put all of our work in open-source and the mainstream guys will use this.

I am an experienced developer so I can always flash a stripped down build if really need the extra RAM, but having to do so at the moment will deter 95% of potential developers. nodeMCU has to streamline this, if they want the penetration.

I want the ESP and the nodeMCU guys and gals to make a commercial success of this because they've both delivered a fantastic product and I take my hat off to both teams.