Discuss here different C compiler set ups, and compiling executables for the ESP8266

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By uzevla
#11300
jcmvbkbc wrote:
projectgus wrote:I haven't found a method to halt into OCD mode at the reset vector yet, but I'll keep trying various combinations. Do you know if xt-ocd do this?

I don't: I haven't attached SRST at all, partly because I had ESP03, where RST is not broken out, partly because I couldn't find an easy way (besides fixing source and rebuilding) to configure xt-ocd to use ARM-USB-TINY-H reset line. It differs from that of the Flyswatter2, which xt-ocd does support.
I'll try to see if xt-ocd is able to do it.


I haven't enabled or worked with any ESP yet. But, if JTRST is attached to SRST internally then you can't do halt on reset.
Also, haven't worked with ARM-USB-TINY-H but there is no reason for openOCD not to have control over both reset pins. Anyway, all irrelevant if the probe links JTRST and SRST for which you could to a test:
Reset core using SRST , halt it, read DOSR or DDR or HW breakpoint register and see if they are still set, since they are in JTRST domain.

P.S. Will send code for HW BPs later....
User avatar
By uzevla
#11336
uzevla wrote:Reset core using SRST , halt it, read DOSR or DDR or HW breakpoint register and see if they are still set, since they are in JTRST domain.


In fact, just try to interrupt w/o setting OCD Enabled again as that control bit is also in JTRST domain.

uzevla wrote:P.S. Will send code for HW BPs later....

For HW instruction BPs, not much to say:
write breakpoint address to IBREAKA0 and 0x1 to IBREAKENABLE

For watchpoint, you can try this (pseudo)code. 'addr, 'size, and 'type' are given by GDB:

Code: Select alluint32_t dbreakc;
uint32_t mask;

for (mask = 1; mask != 0x3f; mask = (mask << 1) + 1)
  if ((addr & ~mask) + mask >= addr + size - 1)
    break;

if (mask != 0x3f) {
  dbreakc = ((type == WRITE_WATCHPOINT ? 2 : 
                        type == READ_WATCHPOINT ? 1 : 3) << 30) | (0x3f & ~mask);
   WRITE_SR(DBREAKA0, addr);
   WRITE_SR(DBREAKC0, dbreakc);
 }


Please let us know if breakpoints (HW/SW) and watchpoints are working for you...
User avatar
By jcmvbkbc
#11597
projectgus wrote:I realised gdb isn't producing valid disassembly in the 'layout asm' view. Shouldn't be hard to fix as 'xtensa-lx106-elf-objdump -d' produces valid disassembly. Have added this and other issues to the Issues list on github: https://github.com/projectgus/openocd/issues

Feel free to add anything else you find.

Got sort of a fix for that issue. Also fixed writing special registers and PC on resume and clobbering a0. Posted pull requests with these fixes.