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Table of Contents

ESP8266 Memory Map

This page describes the physical memory layout of the ESP8266 family.

Reset Vector

The reset vector is 40000080h, which maps to internal ROM.

Memory Layout

Address Name Size Type R/W Description
———: —— ———-::—-: ———–
00000000h Exc
20000000h No
3FF00000h dport0 1000h I/O RW?
3FF10000h No
3FF20000h ? ? RW?
3FF30000h No
3FFC0000h ? 20000h ? RW?
3FFE0000h No
3FFE8000h dram0 14000h RAM RW
3FFFC000h 4000h RAM
40000000h brom? 10000h ROM RW?
40010000h No
40100000h iram1 8000h RAM RW
40108000h ?
40140000h ?
40200000h ?
40300000h ?
60000000h ? 1000h I/O RW?
60001000h ? 800h ? RW?
60001800h ? 800h ? RW?
60002000h Exc
70000000h 90000000h No

SPI Flash ROM Layout (without OTA upgrades)

This is for ESP IoT SDK version 0.8 and above.

Address Size Name Description
——- —- ————————- ———————
00000h 248k app.v6.flash.bin
3E000h 8k masterdevicekey.bin
40000h 240k app.v6.irom0text.bin
7C000h 8k espinitdata_default.bin
7E000h 8k blank.bin
SPI Flash ROM Layout (with OTA upgrades)

This is for ESP IoT SDK version 0.8 and above, supporting OTA upgrades.

Address Size Name Description
——- —- ——————— ————————
00000h 4k boot.bin Bootloader
01000h 64k app.v6.flash1.bin User application, slot 1
11000h 180k app.v6.irom0text1.bin SDK libraries, slot 1
3E000h 8k masterdevicekey.bin OTA device key
40000h 4k Unused
41000h 64k app.v6.flash1.bin User application, slot 2
51000h 180k app.v6.irom0text1.bin SDK libraries, slot 2
7E000h 8k blank.bin Filled with FFh. May be WiFi configuration.

Exception Vectors

Address Name
——— —————
40000010h DebugException
40000020h NMIException
40000030h KernelException
40000050h UserException
40000070h DoubleException
40000080h Reset

Memmory-Mapped I/O Registers

Most of them live in 60000000h.

Base Address Size Name
————: —-: —–
60000000h 80h uart0
60000100h 100h spi1
60000200h 100h spi0
60000300h 74h gpio
60000600h 28h timer
60000700h A4h rtc
60000800h 44h iomux
60000F00h 80h uart1

dport0 (3FF00000h–)

  • 3FF00014h is a clock setting register. Setting bit 0 changes the CPU to 160 MHz mode. Clearing it means 80 MHz. Note that you need to call os_update_cpu_frequency(int freq_in_mhz) when changing the bit. Probably to calibrate timers. The UART divisor is not updated automatically, so you also have to call uart_div_modify(uart_no, clock_freq_in_hz / baud_rate_in_baud).

iomux Pin Registers (60000804h–60000843h)

31    24       16        8        0
-------- -ffff--- -------- ud--UDEe
          `- Function      ||  |||`- Output Enable
                           ||  ||`- Output Enable during sleep
                           ||  |`- Pull-down during sleep
                           ||  `- Pull-up during sleep
                           |`- Pull-down
                           `- Pull-up


- Forum post Memory Layout, p274 - Forum post Firmware Dump, p263 - Forum post Memory Layout, p889 - Forum post Cloud update documentation, p2486 - lx106-rc-2010.1/xtensa-elf/lib/xt2000-rt/memmap.xmm - espiotsdkv0.9.3/examples/IoTDemo/ssl/app/espconn_ssl.c - ESP SDK linker scripts

esp8266_memory_map.1419992832.txt.gz · Last modified: 2014/12/31 02:27 by admin